| ↑ Parent Directory |
| 8-bit computer RAM intro - 2016.description
|
2022-04-26 05:37 |
517 B |
| 8-bit computer RAM intro - 2016.info.json
|
2022-04-26 05:37 |
277.9 KB |
| 8-bit computer RAM intro - 2016.mp4
|
2021-01-07 02:04 |
71.8 MB |
| 8-bit computer update - 2016.description
|
2022-04-26 05:42 |
219 B |
| 8-bit computer update - 2016.info.json
|
2022-04-26 05:42 |
715.8 KB |
| 8-bit computer update - 2016.mp4
|
2018-06-03 06:13 |
39.0 MB |
| ALU Design - 2016.description
|
2022-04-26 05:39 |
405 B |
| ALU Design - 2016.info.json
|
2022-04-26 05:39 |
277.1 KB |
| ALU Design - 2016.mp4
|
2021-01-10 12:38 |
60.3 MB |
| Astable 555 timer - 8-bit computer clock - part 1 - 2016.description
|
2022-04-26 05:42 |
742 B |
| Astable 555 timer - 8-bit computer clock - part 1 - 2016.info.json
|
2022-04-26 05:42 |
280.8 KB |
| Astable 555 timer - 8-bit computer clock - part 1 - 2016.mp4
|
2018-06-03 11:01 |
115.0 MB |
| Bistable 555 - 8-bit computer clock - part 3 - 2016.description
|
2022-04-26 05:41 |
764 B |
| Bistable 555 - 8-bit computer clock - part 3 - 2016.info.json
|
2022-04-26 05:41 |
280.6 KB |
| Bistable 555 - 8-bit computer clock - part 3 - 2016.mp4
|
2020-12-20 14:24 |
97.5 MB |
| Building an 8-bit register - 8-bit register - Part 4 - 2016.description
|
2022-04-26 05:39 |
594 B |
| Building an 8-bit register - 8-bit register - Part 4 - 2016.info.json
|
2022-04-26 05:39 |
277.8 KB |
| Building an 8-bit register - 8-bit register - Part 4 - 2016.mp4
|
2021-01-08 15:17 |
111.5 MB |
| Building the ALU - 2016.description
|
2022-04-26 05:38 |
557 B |
| Building the ALU - 2016.info.json
|
2022-04-26 05:38 |
277.3 KB |
| Building the ALU - 2016.mp4
|
2018-10-31 20:42 |
117.8 MB |
| Bus architecture and how register transfers work - 8 bit register - Part 1 - 2016.description
|
2022-04-26 05:40 |
273 B |
| Bus architecture and how register transfers work - 8 bit register - Part 1 - 2016.info.json
|
2022-04-26 05:40 |
277.4 KB |
| Bus architecture and how register transfers work - 8 bit register - Part 1 - 2016.mp4
|
2021-01-09 04:35 |
124.9 MB |
| Clock logic - 8-bit computer clock - part 4 - 2016.description
|
2022-04-26 05:41 |
679 B |
| Clock logic - 8-bit computer clock - part 4 - 2016.info.json
|
2022-04-26 05:41 |
277.7 KB |
| Clock logic - 8-bit computer clock - part 4 - 2016.mp4
|
2017-04-20 01:23 |
47.3 MB |
| D flip-flop - 2016.description
|
2022-04-26 05:42 |
693 B |
| D flip-flop - 2016.info.json
|
2022-04-26 05:42 |
718.7 KB |
| D flip-flop - 2016.mp4
|
2020-12-21 18:22 |
140.0 MB |
| D latch - 2016.description
|
2022-04-26 05:43 |
615 B |
| D latch - 2016.info.json
|
2022-04-26 05:43 |
268.8 KB |
| D latch - 2016.mp4
|
2021-01-05 21:48 |
80.2 MB |
| Designing and building a 1-bit register - 8 bit register - Part 3 - 2016.description
|
2022-04-26 05:40 |
892 B |
| Designing and building a 1-bit register - 8 bit register - Part 3 - 2016.info.json
|
2022-04-26 05:40 |
278.1 KB |
| Designing and building a 1-bit register - 8 bit register - Part 3 - 2016.mp4
|
2020-12-19 20:06 |
199.2 MB |
| JK flip-flop - 2016.description
|
2022-04-26 05:35 |
536 B |
| JK flip-flop - 2016.info.json
|
2022-04-26 05:35 |
937.4 KB |
| JK flip-flop - 2016.mp4
|
2018-10-28 10:00 |
24.4 MB |
| Monostable 555 timer - 8-bit computer clock - part 2 - 2016.description
|
2022-04-26 05:41 |
759 B |
| Monostable 555 timer - 8-bit computer clock - part 2 - 2016.info.json
|
2022-04-26 05:41 |
281.4 KB |
| Monostable 555 timer - 8-bit computer clock - part 2 - 2016.mp4
|
2017-04-10 23:19 |
97.3 MB |
| RAM module build - part 1 - 2016.description
|
2022-04-26 05:37 |
697 B |
| RAM module build - part 1 - 2016.info.json
|
2022-04-26 05:37 |
278.2 KB |
| RAM module build - part 1 - 2016.mp4
|
2021-01-08 04:25 |
165.4 MB |
| RAM module build - part 2 - 2016.description
|
2022-04-26 05:36 |
906 B |
| RAM module build - part 2 - 2016.info.json
|
2022-04-26 05:36 |
278.3 KB |
| RAM module build - part 2 - 2016.mp4
|
2021-01-07 23:55 |
144.7 MB |
| RAM module build - part 3 - 2016.description
|
2022-04-26 05:36 |
861 B |
| RAM module build - part 3 - 2016.info.json
|
2022-04-26 05:36 |
278.7 KB |
| RAM module build - part 3 - 2016.mp4
|
2021-01-10 18:55 |
185.6 MB |
| RAM module testing and troubleshooting - 2016.description
|
2022-04-26 05:35 |
844 B |
| RAM module testing and troubleshooting - 2016.info.json
|
2022-04-26 05:35 |
277.9 KB |
| RAM module testing and troubleshooting - 2016.mp4
|
2020-12-20 12:00 |
202.3 MB |
| SR latch - 2016.description
|
2022-04-26 05:43 |
695 B |
| SR latch - 2016.info.json
|
2022-04-26 05:43 |
269.4 KB |
| SR latch - 2016.mp4
|
2020-12-20 20:51 |
118.4 MB |
| Testing our computer's registers - 8-bit register - Part 5 - 2016.description
|
2022-04-26 05:39 |
729 B |
| Testing our computer's registers - 8-bit register - Part 5 - 2016.info.json
|
2022-04-26 05:39 |
277.8 KB |
| Testing our computer's registers - 8-bit register - Part 5 - 2016.mp4
|
2017-05-01 01:07 |
86.9 MB |
| Testing the computer's ALU - 2016.description
|
2022-04-26 05:37 |
265 B |
| Testing the computer's ALU - 2016.info.json
|
2022-04-26 05:37 |
266.5 KB |
| Testing the computer's ALU - 2016.mp4
|
2016-08-12 02:56 |
47.5 MB |
| Tri-state logic - Connecting multiple outputs together - 8 bit register - Part 2 - 2016.description
|
2022-04-26 05:40 |
419 B |
| Tri-state logic - Connecting multiple outputs together - 8 bit register - Part 2 - 2016.info.json
|
2022-04-26 05:40 |
277.6 KB |
| Tri-state logic - Connecting multiple outputs together - 8 bit register - Part 2 - 2016.mp4
|
2021-01-08 16:31 |
80.9 MB |
| Troubleshooting the ALU - 2016.description
|
2022-04-26 05:38 |
901 B |
| Troubleshooting the ALU - 2016.info.json
|
2022-04-26 05:38 |
277.6 KB |
| Troubleshooting the ALU - 2016.mp4
|
2020-12-21 03:06 |
174.4 MB |
| Twos complement - Negative numbers in binary - 2016.description
|
2022-04-26 05:39 |
372 B |
| Twos complement - Negative numbers in binary - 2016.info.json
|
2022-04-26 05:39 |
727.4 KB |
| Twos complement - Negative numbers in binary - 2016.mp4
|
2017-10-26 21:06 |
54.8 MB |